The present invention relates to a solid electrolytic capacitor and a method of manufacturing the solid electrolytic capacitors.
Metal particles having rectifying action, such as tantalum or niobium, are formed and sintered into porous chips 21 each with an upstanding anode rod 22 made of metal, such as tantalum or niobium, as shown in FIG. 14. The anode rods 22 of a plural number of chips 21 thus formed are mounted on a horizontal plate 23 in a state that those chips 21 are arrayed at preset pitches along the horizontal plate 23, and the upper faces 21a of the chips 21 are aligned and flush with one another.
The chips 21 thus mounted on the horizontal plate 23 are immersed in a forming liquid 24, such as phosphate aqueous solution, as shown in FIG. 15. In this state, an anodic treatment is carried out under flow of d.c. current, so that a dielectric layer 25, made of tantalum pentoxide, is formed on the surfaces of the rectifying metal particles of each chip 21. In this case, the dielectric layer 25 is also formed on the outer surface of the root of each anode rod 22 over a proper length or height thereof by setting the upper faces 21a of the chips 21 at a proper depth below the surface level of the forming liquid 24.
Then, as shown in FIG. 16, the chips 21 with the dielectric layers 25 thus formed, which are suspended from the horizontal plate 23, are immersed into an aqueous solution 26 of manganese nitrate, at such a depth that the upper faces 21a of the chips 21 are not lower than the liquid level of the manganese nitrate aqueous solution 26. After the innards of the chips 21 are impregnated with the manganese nitrate aqueous solution 26, the chips 21 are pulled out of the manganese nitrate aqueous solution 26, and heated to remove moisture therefrom by evaporation. The impregnation and evaporation process is repeated several times. As a result, a solid electrolytic layer 27 made of manganese dioxide is formed on the surface of the dielectric layer 25 of each chip 21. Alternatively, a solid electrolytic layer as an organic semiconductor layer may be formed on the surface of the dielectric layer 25. To form the solid electrolytic layer, an electrolytic polymerizing method or a vapor phase polymerizing method may be used. In this way, capacitor elements are manufactured. In the process for forming the solid electrolytic layer 27 by immersing the chips 21 into the manganese nitrate aqueous solution 26, if the upper surfaces 21a of the chips are below the liquid level of the aqueous solution, the solid electrolytic layer 27 is formed to cover the dielectric layer 25 at the root of the anode rod 22. The anode rod 22 as anode is electrically continuous to the solid electrolytic layer 27 as the cathode. The resultant capacitor element will lose its function as a capacitor. In the process of forming the solid electrolytic layer, if the liquid level of the manganese nitrate aqueous solution 26 is much lower than the upper faces 21a of the chips 21, an insufficient capacitance is obtained relative to the volume of the chip 21. In this respect, the level of the chips 21 in the aqueous solution must be strictly adjusted.
Thus, in manufacturing the solid electrolytic capacitors by the conventional method, the anode rods 22 must be protruded from the chips 21 in order to insulate the anode from the cathode by isolation. A graphite layer is formed on the solid electrolytic layer 27 of each capacitor element thus formed, and a conductive layer of metal, such as silver or gold, is further formed over the graphite layer of the capacitor element. As shown in FIG. 17, a lead terminal 29 is connected to the conductive layer of the chip 21, and another lead terminal 30 is connected to the anode rod 22 protruded from the chip 21. Finally, the structure of the capacitor element 28 with the lead terminals 29 and 30 is molded by resin 31 into a capacitor with the anode and cathode lead terminals of which the major parts are exposed outside, as shown.
As described above, in the conventional method of manufacturing the solid electrolytic capacitors, the dielectric layer and the solid electrolytic layer must be formed on the chips in a state that the anode rods are extended upward from the upper faces of the chips, in order to secure an access to the anode from outside. Further, the chips must be processed while being suspended from the horizontal plate. Accordingly, the number of the chips processed at one time is limited by the length of the horizontal plate. This leads to reduction of the production efficiency.
Additionally, in the process to form the dielectric layers and the solid electrolytic layers on the chips, the chips are immersed at an exact depth into the forming liquid and the manganese nitrate aqueous solution in a state that the upper faces of the chips are aligned with one another. This requires complication of the manufacturing work and an exactness of the process control.
The capacitor formed as shown in FIG. 17 is molded by resin. Because of this, the volume of the whole capacitor is large relative to the volume of the capacitor element. The volumetric efficiency is low, and the volume of the capacitor is large relative to the electric capacitance gained.